TRIJAL P G
Trijal P G

Trijal P G · Chennai, India

I build the company and the board it ships.

Founder & CEO of Qynetic Labs. Hardware designer.

--:-- in Chennai27 public repos

02The board

Vayu One

A Rockchip RK3568 computer I designed in KiCad. 12 layers, 182 parts, zero unrouted.

3D render of the Vayu One board

The lineupSwipe

03Silicon

My own chips.

Two NPUs in manufacture, and a TPU that already ships inside Vayu Pro and Ultra.

In manufacture

2 Neural Processing Units

AI models run on the device itself: thousands of multiply-accumulate units work in parallel, with memory right beside them.

Manufactured · shipping

1 Tensor Processing Unit

  • 197TFLOPS BF16
  • 393TOPS INT8

Built for cost-efficient inference, inside and .

Tap a chip to open it · drag to turn it

04The plan

Board → silicon → platform.

Qynetic Labs is building India’s full-stack edge-AI platform, ending in our own QChip silicon.

    05Builds

    Things I’ve built.

    Solvers, security boxes, sensors and agents. Tap one for the full story.

    06Journey

    From a website to a chip company.

      B.E. Computer Science (Cyber Security)Chennai Institute of Technology · 2028
      Qualified for the IIT Madras B.S. in Data Science

      07Live

      Shipping in public.

      08Say hello

      Let’s build something.

      Founder’s office, product, hardware or edge AI: if you’re working on something real, I’d like to hear about it.

      trijalpg@qyneticlabs.com
      U1 · Trijal P G
      Trijal P G
      Trijal P G Open to founder’s office, product, hardware & edge-AI roles

      I build the company and the board it ships.

      I’m Trijal, founder & CEO of Qynetic Labs, an edge-AI hardware startup in Chennai. Hardware, software, security, and the plan that pays for them.

      Y1 · Local time
      --:--
      Chennai, India
      13.08° N · 80.27° E · IST
      U2 · Vayu One

      Vayu One

      12 layers. 182 parts. Zero unrouted.

      RK3568 · v4.3
      • 100 × 70 mm
      • 2,038 vias
      • 3 mil tracks
      U5 · Qynetic Labs

      A platform, not a cheap board.

      Qynetic Labs makes edge-AI computers: AI that runs on the device, not in the cloud. Our own hardware, OS, SDKs and fleet tools, with public-sector channels and local support.

      Founded 2024 · Private Limited since June 2026

      • India-local trust
      • Developer ecosystem
      • Own silicon
      U6 · Pinout

      Four domains, one chip.

        U14 · Vayu lineup

        Five boards. One software stack.

        From a developer board to a 434 TOPS edge server, all running QyneticOS and the same SDK. Tap a board for its specs.

        U15 · QChip

        Our own silicon, in three steps.

        R2 · 10-year plan

        Board → silicon → platform.

          U16 · NPU
          2

          In manufacture

          Neural Processing Units

          An NPU runs AI models on the device itself. Thousands of multiply-accumulate units do the maths in parallel, while on-chip memory keeps weights and data close, so inference is fast and light on power.

          Drag to rotate · tap to open

          Inside the NPU die

            1. Design complete
            2. In manufacture
            3. Bring-up
            U17 · TPU
            1

            Manufactured · in the Vayu lineup

            Tensor Processing Unit

            Built for cost-efficient inference. A TPU is designed around matrix multiplication, the core operation of every neural network: data and weights flow through a grid of processing cells in lockstep, so each value is reused many times instead of being fetched again.

            197
            TFLOPS · BF16
            393
            TOPS · INT8
            Inside
            ·

            Drag to rotate · tap to open

            How the TPU computes

              1. Design complete
              2. Manufactured
              3. In Vayu Pro & Ultra
              U13 · Experience
              1. Founder & CEO, Hardware LeadQynetic Labs Private Limited · 2024 – Present
              2. Data Center Systems & IT-OT InternAfcons Infrastructure Ltd. (Shapoorji Pallonji Group) · May 2026 – Aug 2026
              3. Freelance Web & App DeveloperSelf-employed · 2019 – Present

              B.E. Computer Science & Engineering (Cyber Security) · Chennai Institute of Technology · 2028 · IIT Madras B.S. (qualified)

              J3 · GitHub activity
              Syncing with GitHub…
              –contributions, last 12 months
              –active days
              –longest streak
              –followers

              Contributions per month

              Languages by code size

                R1 · Story

                It started with a website.

                1. 2019First paid website
                2. 2021National runner-up, web design
                3. 2022National winner, web design
                4. 2024Started Qynetic Labs
                5. 2025Built YUNA
                6. 2026Pvt Ltd, Vayu One, SIH, Afcons

                Details

                U2 · Vayu One · 3D Exported from KiCad · 182 components

                Vayu One, in 3D.

                Loading the 3D model (0.9 MB)…

                Drag to rotate · scroll or pinch to zoom